1. Field of the Invention
This invention relates to a method of forming a semiconductor thin film applicable to a constituent element of a three-dimensional integrated circuit or to a large-area electronic device.
2. Description of the Prior Art
In the field of crystal forming technology for making a crystalline thin film grow on an amorphous substrate, a method has been proposed in which an amorphous thin film previously formed on a substrate is processed by a heat treatment at a temperature lower than the melting point to effect solid phase growth. For example, T. Noguchi, H. Hayashi and H. Ohshima disclosed a method of this kind in 1987 Materials Research Society Symposium Proceeding Vol. 106, "Polysilicon and Interface," p. 293, Elsevier Science Publishing, New York, 1988.
In this method, polycrystalline Si is deposited on SiO.sub.2 by a low pressure chemical vapor deposition (LPCVD) method, Si.sup.+ ions are injected into the deposited Si to make the same amorphous, and a crystal is thereafter grown therefrom by heat treatment at about 600.degree. C. It is known that this method enables formation of a thin film of large-grain-size dendrite polycrystal having a maximum grain size of 5 .mu.m.
FIG. 6 schematically shows a polycrystalline thin film obtained by this method. As shown in FIG. 6, grain boundaries cannot be made linear, and it is difficult to control the grain boundary position with accuracy. Dendrite crystal referred to herein denotes a crystal having internal twin boundaries and growing by extending lateral branches in all directions. In FIG. 6, reference characters 61, 62, and 63 respectively indicate a substrate, crystal grains, and grain boundaries. In a central portion of each crystal grain, a region where the degree of damage due to ion injection is low is defined.
The polycrystalline thin film obtained by this method has a grain size several hundred times greater than that of a conventional thin film formed in a polycrystalline structure only by deposition, and can be used for manufacture of a high-performance electronic device.
For example, if this polycrystalline thin film is used for a field effect transistor, the transistor can operate at an electron mobility about ten times higher than that in the case of a thin film formed in a polycrystalline structure only by CVD.
However, the thin film formed by this crystal growth method has the following two drawbacks.
The first drawback is that although the maximum grain size of the solid phase grown film is increased to a size on the .mu.m order, the grain size distribution and the positions of crystal grain boundaries are not controlled. This is because the crystallization of the amorphous Si thin film is based on the solid phase growth of crystal nuclei generating randomly in the amorphous structure by heat treatment, and because the positions of grain boundaries formed by collision of crystal grains are therefore disordered so that the grain size is distributed over a wide range.
It is known that a multiplicity of carrier traps cluster together at each grain boundary and that they form a barrier against transportation of carriers. That is, the positions of grain boundaries greatly influence characteristics of the electronic device made thereon. For example, a thin film having a maximum grain size of 5 .mu.m, which was obtained by making a thin film amorphous by Si ion injection and heat-treating the thin film in N.sub.2 at 600.degree. C. for 50 hours, was observed with a transmission electron microscope to examine the grain size distribution in detail. It was thereby found that the majority of the crystal grains had grain sizes smaller than 1 .mu.m and that the grain size was distributed widely over a range of 0.1 to 5 .mu.m. It was also observed that this distribution greatly influenced characteristics of a transistor formed on the film, specifically, dispersions of mobility, threshold, and subthreshold characteristics in the wafer. This influence is particularly strong when the channel length is smaller than the maximum grain size. This is because disorder of the grain size and grain boundaries reduces the uniformity of the number and amount of barriers in the channel. This problem is very serious in terms of integrated circuit design.
The second drawback resides in crystalline defects in crystal grains. As mentioned above, a solid phase grown crystal is a dendrite crystal, and this crystal grows by introducing a multiplicity of twin boundaries in it and by extending lateral branches. A high resolution test was made with respect to a group of crystals growing between lateral branches by observation using a transmission electron microscope, and a discontinuity in lattice fringes was thereby observed.
Large-grain-size dendrite crystals were examined by electron beam analysis using a low-magnification electron microscope, and it was thereby found that large-grain-size dendrite crystals having a size on the .mu.m order were single crystals generally uniform in crystal orientation.
Defects in crystal grains act as obstructions against carrier movement. If a short channel device having a channel length smaller than the maximum grain size is manufactured, it cannot stand comparison with a bulk Si device in performance.